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HV9930 HV9930 Hysteretic Boost-Buck (uk) LED Driver ICs
Features
Constant Output Current Steps Output Voltage Up or Down Low EMI Variable Frequency Operation Internal 8 to 200V Linear Regulator Input and output current sensing Input Current limit Enable & PWM Dimming
General Description
The HV9930 is a variable frequency PWM controller IC designed to control an LED lamp driver using a low noise boost-buck (Cuk) topology. The HV9930 uses hystereticcurrent mode control to regulate both the input and the output currents. This enables fast transient response (required for PWM dimming) without the necessity for complex loop compensation. Input current control enables current limiting during startup and output overload conditions. Capacitive isolation protects the LED Lamp from failure of the switching MOSFET. HV9930 provides a low-frequency PWM dimming input that can accept an external control signal with a duty ratio of 0-100%. The HV9930 based LED driver is ideal for automotive LED lamps and RGB backlight applications with low voltage DC inputs. The HV9930 based LED Lamp drivers can achieve efficiency in excess of 80%.
Applications
Automotive LED Drivers RGB backlight applications Battery Powered LED Lamps Other Low Voltage AC/DC or DC/DC LED Drivers
Typical Application Circuit
D2 L1 C1 L2
VDC Rcs1
Rd Cd
Q1
D1 Rcs2
D3
VO
+
Rs1
HV9930
VIN GATE CS1 Rref1 GND VDD PWMD CS2 REF
Rs2a C2 Rs2b
Rref2 C3
A090805
Supertex inc.
* 1235 Bordeaux Drive, Sunnyvale, CA 94089 * Tel: (408) 222-8888 * FAX: (408) 222-4895 * www.supertex.com A090805 1
HV9930
Ordering Information
Device HV9930 Package Options 8 pin SOIC 8 pin DIP HV9930LG-G HV9930P-G
Absolute Maximum Ratings
VIN to GND..................................... -0.5V to +200V -0.3V to +13.5V VDD to GND................................... CS1, CS2 to GND............................. -0.3V to VDD + 0.3V PWMD to GND................................. -0.3V to (VDD + 0.3V) GATE to GND................................... 0.3V to (VDD + 0.3V) Continuous Power Dissipation (TA = +25C) (Note 1) 8-Pin DIP (derate 9mW/C above +25C)............ 900mW 8-Pin SO (derate 6.3mW/C above 25C)........... 630mW Operating Temperature Range ...................-40C to +85C Junction Temperature..................................+125C Storage Temperature Range .......................-65C to +150C
Stresses beyond those listed under ``Absolute Maximum Ratings'' may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
-G indicates package is RoHS compliant `Green'
Electrical Characteristics
(The * denotes the specifications which apply over the full operating junction temperature range of 0C < TA < +85C, otherwise the specifications are at TA = 25C, VDD = 7.5V, unless otherwise noted)
Symbol Input VINDC IINsd
Description Input DC supply voltage range* Shut-Down mode supply current*
Min 8
Typ
Max 200
Units V mA
Conditions DC input voltage PWM_D connected to GND, VIN = 12V
0.5
1
Internal Regulator VDD IDD(ext) UVLO UVLO VDD(ext) Reference VREF REF pin voltage* 1.212 1.25 1.288 V REF bypassed with a 0.1F capacitor to GND; IREF = 0; VDD = 7.5V; PWMD = 5V VREFLINE Line regulation of reference voltage Reference Output current range1 Load regulation of reference voltage 0 20 mV REF bypassed with a 0.1F capacitor to GND; IREF = 0; VDD = 7 - 12V; PWMD = 5V IREF -0.01 1.0 mA REF bypassed with a 0.1F capacitor to GND; VDD = 7 - 12V; PWMD = 5V REF bypassed with a 0.1F capacitor to GND; IREF = 0 - 500A; VDD = 7.5; PWMD = 5V Internally regulated voltage VDD current available for external circuitry 1 VDD under voltage lockout threshold VDD under voltage lockout hysteresis Steady State external voltage which can applied at the VDD pin 6.45 6.7 500 12 7.0 7.5 9.0 1.0 6.95 V mA V mV V VIN = 8-200V, IDD(ext) = 0, GATE open VIN = 8-200V VIN rising
VREFLOAD
0
25
mV
PWM Dimming VPWMD(lo) VPWMD(hi) RPWMD PWMD input low voltage* PWMD input high voltage* PWMD pull-down resistance 2.4 50 100
2
0.8 150
V V k
VIN = 10 - 200V VIN = 10 - 200V VPWMD = 5V
A090805
HV9930
Gate ISOURCE ISINK TRISE TFALL GATE short circuit current, sourcing GATE sinking current GATE output rise time GATE output fall time 0.165 0.165 30 30 50 50 A A ns ns VGATE = 0V; VDD = 7.5V VGATE = 10V ; VDD = 7.5V CGATE = 500pF; VDD = 7.5V CGATE = 500pF; VDD = 7.5 V
Input Current Sense Comparator VTURNON1 VTURNOFF1 TD1, ON TD1, OFF Voltage required to turn GATE on* Voltage required to turn GATE off* Delay to Output (turn-on) Delay to Output (turn-on) 88 -12 100 0 150 150 112 12 250 250 mV mV ns ns CS2 = 200mV ; CS1 increasing ; GATE goes LOW to HIGH CS2 = 200mV ; CS1 decreasing ; GATE goes HIGH to LOW CS2=200mV ; CS1 = 50mV to 200mV step CS2=200mV ; CS1 = 50mV to -100mV step
Output Current Sense Comparator VTURNON2 VTURNOFF2 TD2, ON TD2, OFF
1
Voltage required to turn GATE on* Voltage required to turn GATE off* Delay to Output (turn-on) Delay to Output (turn-on)
88 -12
100 0 150 150
112 12 250 250
mV mV ns ns
CS1 = 200mV ; CS2 increasing ; GATE goes LOW to HIGH CS1 = 200mV ; CS2 decreasing ; GATE goes HIGH to LOW CS1=200mV ; CS2 = 50mV to 200mV step CS1=200mV ; CS2 = 50mV to -100mV step
Also limited by package power dissipation limit, whichever is lower.
Pinout
Pin Description
VIN - This pin is the input of a 8-200V voltage regulator. VDD - This is a power supply pin for all internal circuits. It must be bypassed with a low ESR capacitor to GND. GATE - This pin is the output gate driver for an external Nchannel power MOSFET. GND - Ground return for all the internal circuitry. This pin must be electrically connected to the ground of the power train. REF - This pin provides accurate reference voltage. It must be bypassed with a 0.01-0.1uF capacitor to GND. PWM - When this pin is pulled to GND, switching of the HV9930 is disabled. When the PWM pin is released, or external TTL high level is applied to it, switching will resume. This feature is provided for applications that require PWM dimming of the LED lamp. CS1 and CS2 - These pins are used to sense the input and output currents of the boost-buck converter. They are the non-inverting inputs of the internal comparators.
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HV9930
Functional Block Diagram
VIN
Regulator
Input Comparator
7.5V
VDD
CS1
GATE
100mV
CS2
Output Comparator
1.25V
REF
PWMD
HV9930
GND
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A090805
HV9930
Functional Description
Power Topology
The HV9930 is optimized to drive a continuous conduction mode (CCM) boost-buck DC/DC converter topology commonly referred to as "uk converter" (see Circuit Diagram on page 1). This power converter topology offers numerous advantages useful for driving high-brightness light emitting diodes (HB LED). These advantages include step-up or step-down voltage conversion ratio and low input and output current ripple. The input and the output inductors can also share a common core. The output load is decoupled from the input voltage with a capacitor making the driver inherently failure-safe for the output load. The HV9930 offers a simple and effective control technique for use with a boost-buck LED driver. It uses two hysteretic mode controllers - one for the input and one for the output. The outputs of these two hysteretic comparators are AND together, and used to drive the external FET. This control scheme gives accurate current control and constant output current in the presence of input voltage transients without the need for complicated loop design. The input side hysteretic controller is in operation only during start-up and overload conditions. This ensures that the input current never exceeds the designed value. During normal operation, the input current will be less than the programmed current and hence, the output of the input side comparator will be HIGH. The output of the AND gate will then be dictated by the output current controller. The output side hysteretic comparator will be in operation during the steady state operation of the circuit. This comparator turns the MOSFET on and off based on the LED current. The use of these comparators in a boost-buck topology is a patent-pending technique, which eliminates the need for compensation components.
PWM Dimming
PWM Dimming can be achieved by applying a TTL-compatible square wave signal at the PWM pin. When the PWMD pin is pulled high, the gate driver is enabled and the circuit operates normally. When the PWMD pin is left open or connected to GND, the gate driver is disabled and the external MOSFET turns off. The IC is designed so that the signal at the PWMD pin inhibits the driver only and the IC need not go through the entire start-up cycle each time ensuring a quick response time for the output current. The flying capacitor in the Cuk converter (C1) is initially charged to the input Voltage VDC (through diodes D1 and D2). When the circuit is turned on and reaches steady state, the voltage across C1 will be VDC+VO. In the absence of diode D2, when the circuit is turned off, capacitor C1 will discharge through the LEDs and the input voltage source VDC. Thus, during PWM dimming, if capacitor C1 has to charged and discharged each cycle, the transient response of the circuit will be limited. By adding diode D2, the voltage across capacitor C1 is held at VDC+VO even when the circuit is turned off enabling the circuit to return quickly to its steady state (and bypassing the start-up stage) upon being enabled.
Input Voltage Regulator
The HV9930 can be powered directly from its VIN pin that takes a voltage from 8V to 200V. When a voltage is applied at the VIN pin, the HV9930 tries to maintain a constant 7.5V (typ) at the VDD pin. The regulator also has a built in under-voltage lockout which shuts off the IC if the voltage at the VDD pin falls below the UVLO threshold. The VDD pin must be bypassed by a low ESR capacitor (0.1F) to provide a low impedance path for the high frequency current of the output gate driver. The IC can also be operated by supplying a voltage at the VDD pin greater than the internally regulated voltage. This will turn off the internal linear regulator and the IC will function by drawing power from the external voltage source connected to the VDD pin. In case of input transients that reduce the input voltage below 8V (like cold crank condition in an automotive system), the VIN pin of the HV9930 can be connected to the drain of the MOSFET through a diode. Since the drain of the FET is at a voltage equal to the sum of the input and output voltages, the IC will still be operational when the input goes below 8V. In these cases, a larger capacitor is needed to the VDD pin to supply power to the IC when the MOSFET is ON.
Application Information
Over-voltage Protection
Over-voltage protection can be added by splitting the output side resistor Rs2 into two components and adding a zener diode D3. When there is an open LED condition, the diode D3 will clamp the output voltage and the zener diode current will be regulated by the sum of Rs2a and Rcs2.
Reference
An internally trimmed voltage reference of 1.25V (+/- 3%) is provided at the REF pin. The reference can supply a maximum output current of 1mA to drive external circuitry. This reference can be used to set the current thresholds of the two comparators as shown in the Typical Application Circuit.
Damping Circuit
The Cuk converter is inherently unstable when the output current is being controlled. An uncontrolled input current will lead to an un-damped oscillation between L1 and C1 causing excessively high voltages across C1. To prevent these oscillations, a damping circuit consisting of Rd and Cd is applied across the capacitor C1. This damping circuit will help to stabilize the circuit and help in the proper operation of the HV9930 based Cuk converter.
Current Comparators
The HV9930 features two identical comparators with a built-in 100mV hysteresis. When the GATE is low, the inverting terminal is connected to 100mV and when the GATE is high, it is connected to GND. One comparator is used for the input current control and the other for the output current control.
Design and Operation of the Boost-Buck Converter
For details on the design for a Boost-Buck converter using the HV9930 and the calculation of the damping components, please refer to Application Note AN-H51.
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HV9930
Design Example
The choice of the resistor dividers to set the input and output current levels is illustrated by means of the design example given below. The parameters of the power circuit are: Assuming a 30% peak-to-peak ripple when the converter is in input current limit mode, the minimum value of the input current will be: I lim,min = 0.85 I in ,lim . (4) Setting
Vin min = 9V Vin max = 16V Vo = 28V Io = 0.35 A fs min = 300 kHz
Using these parameters, the values of the power stage inductors and capacitor can be computed as (see Application Note AN-H51 for details):
I lim,min = 1.05 I in ,pk ,
(5)
The current level to limit the converter can then be computed.
Iin lim =
1.05 Iinpk 0.85 = 2 .1 A
(6)
Using Io = 0.35 A and Io = 0.0875 A in (1) and (2),
Rcs 2 = 1.78 Rs 2 = 0.5625 Rref 2
Before the design of the output side is complete, over voltage protection has to be included in the design. For this application, choose a 33V zener diode. This is the voltage at which the output will clamp in case of an open LED condition. For a 350mW diode, the maximum current rating at 33V works out to about 10mA. Using a 2.5mA current level during open LED conditions, and assuming the same Rs 2 Rref 2 ratio,
L1 = 82 H L2 = 150 H C1 = 0.22 F
The input and output currents for this design are:
Iin max = 1.6 A
Iin = 0.21 A
Io = 350 mA
Rcs 2 + Rs 2 a = 120 .
Choose the following values for the resistors:
(6)
Io = 87.5 mA
Output Current Limits
The current sense resistor ( Rcs 2 ), combined with the other resistors ( Rs 2 & Rref 2 ), determines the output current limits. The current sense resistor ( Rcs1 ), combined with the other resistors ( Rs1 & Rref 1 ), determines the input current limits. The resistors can be chosen using the following equations:
R cs 2 = 1.65 , 1 / 4W , 1%
R ref 2 = 10 k , 1 / 8W , 1% R s 2 a = 100 , 1 / 8W , 1% R s 2 b = 5.23 k , 1 / 8W , 1%
The current sense resistor needs to be at least a 1/4W, 1% resistor. Similarly, using Iin = 2.1A and Iin = 0.3 x Iin = 0.63 A in (1) and (2),
I x Rcs = 1.2V x
Rs - 0.05V RRe f Rs + 0.1V RRe f
(1) (2)
I x Rcs = 0.1V x
R s1 = 0.442 R ref 1 R cs1 = 0.228
2 PRcs1 = I in ,lim R cs1 = 1W
Where I is the current (either Io or Iin ) and I is the peak-topeak ripple in the current (either Io or Iin ). For the input side, the current level used in the equations should be larger than the maximum input current so that it does not interfere with the normal operation of the circuit. The peak input current can be computed as:
Choose the following values for the resistors:
Rcs1 = parallel combination of three 0.68 , 1 / 2W , 5% resistors R ref 1 = 10 k , 1 / 8W , 1% R s1 = 4.42 k , 1 / 8W , 1%
I in ,pk = I in ,max + = 1.706 A
I in
2
(3)
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A090805
HV9930
8-LEAD SMALL OUTLINE PACKAGE (LG) (MS-012AA)
D
H E H1
h
0.020 0.009 (0.508 0.2286)
C A L1
e A1
B
L
0.0275 0.0025 (0.6985 0.0635)
Note: Circle (e.g. B ) indicates JEDEC Reference.
Measurement Legend =
Dimensions in Inches (Dimensions in Millimeters)
8-LEAD PLASTIC DUAL IN-LINE PACKAGE (P)
0.040 (1.016) TYP 0.395 max
0.250 0.015
0.250 0.005
0.030 0.110
1
0.300 - 0.320 0.130 0.005 0.125 min. 0.020
0.020 min.
0 - 10!
0.009 - 0.015 0.018 0.003 0.100 0.010 0.325 +0.025 -0.015
Note: Circle (e.g. B ) indicates JEDEC Reference.
Measurement Legend =
Dimensions in Inches (Dimensions in Millimeters)
DSFP-HV9930 A090805
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